4 Commits

Author	SHA1	Message	Date
Cyril Roussillon	0b4e324af2	chunker: optimized the barrel shift ... move the modulo out of the barrel shift and use 32bits variables so that the compiler recognizes it and uses the "rol*" asm instructions. Before: 245 MiB/s After: 338 MiB/s CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz Modification by Jonas: commit message formatting and added Cyril Roussillon to AUTHORS	2014-05-13 23:05:13 +02:00
Jonas Borgström	a87a019608	cachedir: Add CACHEDIR.TAG file to attic cache dirs	2014-05-01 14:56:21 +02:00
Jonas Borgström	3d53e00116	Added Johann Klähn to AUTHORS	2014-03-22 20:31:27 +01:00
Jonas Borgström	7109318bd0	Added AUTHORS file	2014-02-03 21:07:03 +01:00